Registers of the 8086 CPU

Four 16-bit registers can be divided into two 8-bit registers

• AX = AH|AL - Accumulator (Accumulator High|Accumulator Low)  The ax register (Accumulator) is where most arithmetic and logical computations take place. Although you can do most arithmetic and logical operations in other registers, it is often more efficient to use the ax register for such computations.
• BX = BH|BL - Base (High|Low)- can be used as "pointer"  The bx register (Base) has some special purposes as well. It is commonly used to hold indirect addresses, much like the bx register on the x86 processors.
• CX = CH|CL - Count (High|Low) - used for counting loops  The cx register (Count), as its name implies, counts things. You often use it to count off the number of iterations in a loop or specify the number of characters in a string.
• DX = DH|DL - Data (High|Low) - paired with AX for "combined" 16-bit register. DX is high word, AX is low word.  The dx register (Data) has two special purposes: it holds the overflow from certain arithmetic operations, and it holds I/O addresses when accessing data on the 80x86 I/O bus.

4 general purpose registers (AX, BX, CX, DX) are made of two separate  registers, The same is for other 3 registers, "H" is for high and "L" is for low part.

Four 16-bit registers used for Indexing and Stack

• SI - Source Index - used for indirect addressing 
• DI - Destination Index - used for indirect addressing.  The si and di registers (Source Index and Destination Index ) have some special purposes as well. You may use these registers as pointers (much like the bx register) to indirectly access memory. You'll also use these registers with the 8086 string instructions when processing character strings. 
• SP - Stack Pointer - accesses Stack Segment . The sp register (Stack Pointer) has a very special purpose - it maintains the program stack. Normally, you would not use this register for arithmetic computations. The proper operation of most programs depends upon the careful use of this register.  
• BP - Base Pointer. The bp register (Base Pointer) is similar to the bx register. You'll generally use this register to access parameters and local variables in a procedure. 

Uses of General-Purpose Data Registers

The 16-bit general-purpose data registers AX, BX, CX, DX, SI,  DI, BP, and  SP are provided for holding the following items:

• Operands for logical and arithmetic operations
• Operands for address calculations
• Memory pointers

Although all of these registers are available for general storage of operands, results, and pointers, caution should be used when referencing the ESP register. The ESP register holds the stack pointer and as a general rule should not be used for any other purpose.

General Purpose 16 bit Registers

6 Special Purpose Registers

• CS (Code); DS (Data); ES (Extra); (SS) Stack segment registers. The 8086 has four special segment registers: cs, ds, es, and ss. These stand for Code Segment, Data Segment, Extra Segment, and Stack Segment, respectively. These registers are all 16 bits wide. They deal with selecting blocks (segments) of main memory. A segment register (e.g., cs) points at the beginning of a segment in memory.  Segments of memory on the 8086 can be no larger than 65,536 bytes long. 
• CS  The cs register points at the segment containing the currently executing machine instructions. Note that, despite the 64K segment limitation, 8086 programs can be longer than 64K. You simply need multiple code segments in memory. Since you can change the value of the cs register, you can switch to a new code segment when you want to execute the code located there.
• DS  The data segment register, ds, generally points at global variables for the program. Again, you're limited to 65,536 bytes of data in the data segment; but you can always change the value of the ds register to access additional data in other segments.
• ES  The extra segment register, es, is exactly that - an extra segment register. 8086 programs often use this segment register to gain access to segments when it is difficult or impossible to modify the other segment registers.  
• SS  The ss register points at the segment containing the 8086 stack. The stack is where the 8086 stores important machine state information, subroutine return addresses, procedure parameters, and local variables. In general, you do not modify the stack segment register because too many things in the system depend upon it.

General Information about Segment Registers

The segment registers (CS, DS, SS, ES, FS, and GS) hold 16-bit segment selectors. A segment selector is a special pointer that identifies a segment in memory. To access a particular segment in memory, the segment selector for that segment must be present in the appropriate segment register.

When writing application code, programmers generally create segment selectors with assembler directives and symbols. The assembler and other tools then create the actual segment selector values associated with these directives and symbols. If writing system code, programmers may need to create segment selectors directly.

How segment registers are used depends on the type of memory management model that the operating system or executive is using. When using the flat (unsegmented) memory model, the segment registers are loaded with segment selectors that point to overlapping segments, each of which begins at address 0 of the linear address space (as shown in Figure below). These overlapping segments then comprise the linear address space for the program. (Typically, two overlapping segments are defined: one for code and another for data and stacks. The CS segment register points to the code segment and all the other segment registers point to the data and stack segment.)

When using the segmented memory model, each segment register is ordinarily loaded with a different segment selector so that each segment register points to a different segment within the linear address space (as shown in Figure below). At any time, a program can thus access up to six segments in the linear-address space. To access a segment not pointed to by one of the segment registers, a program must first load the segment selector for the segment to be accessed into a segment register.

Each of the segment registers is associated with one of three types of storage: code, data, or stack). For example, the CS register contains the segment selector for the code segment, where the instructions being executed are stored. The processor fetches instructions from the code segment, using a logical address that consists of the segment selector in the CS register and the contents of the IP register. The IP register contains the linear address within the code segment of the next instruction to be executed. The CS register cannot be loaded explicitly by an application program. Instead, it is loaded implicitly by instructions or internal processor operations that change program control (such as, procedure calls, interrupt handling, or task switching).

The SS register contains the segment selector for a stack segment, where the procedure stack is stored for the program, task, or handler currently being executed. All stack operations use the SS register to find the stack segment. Unlike the CS register, the SS register can be loaded explicitly, which permits application programs to set up multiple stacks and switch among them.

• IP - Instruction Pointer holds address of next instruction   It contains the address of the currently executing instruction. This is a 16 bit register which provides a pointer into the current code segment . The instruction pointer (IP) register contains the offset in the current code segment for the next instruction to be executed. It is advanced from one instruction boundary to the next in straight line code or it is moved ahead or backwards by a number of instructions when executing JMP, Jcc, CALL, RET, and IRET instructions. The IP register cannot be accessed directly by software; it is controlled implicitly by control transfer instructions (such as JMP, Jcc, CALL, and RET), interrupts, and exceptions. The only way to read the IP register is to execute a CALL instruction and then read the value of the return instruction pointer from the procedure stack. The IP register can be loaded indirectly by modifying the value of a return instruction pointer on the procedure stack and executing a return instruction (RET or IRET). 
• Flag Register  or  FLAGS Register The 16-bit FLAGS register contains a group of status flags, a control flag, and a group of system flags. Figure below  defines the flags within this register.  Some of the flags in the FLAGS register can be modified directly, using special-purpose instructions (described in the following sections). There are no instructions that allow the whole register to be examined or modified directly. However, the following instructions can be used to move groups of flags to and from the procedure stack or the AX register: 
• LAHF
• SAHF
• PUSHF
• PUSHFD
• POPF
• and POPFD.  

After the contents of the FLAGS register have been transferred to the procedure stack or AX register, the flags can be examined and modified using the processor’s bit manipulation instructions (BT, BTS, BTR, and BTC).  When suspending a task (using the processor’s multitasking facilities), the processor automatically saves the state of the FLAGS register in the task state segment (TSS) for the task being suspended. When binding itself to a new task, the processor loads the FLAGS register with data from the new task’s TSS.

When a call is made to an interrupt or exception handler procedure, the processor automatically saves the state of the FLAGS registers on the procedure stack. When an interrupt or exception is handled with a task switch, the state of the FLAGS register is saved in the TSS for the task being suspended.

• STATUS FLAGS  The status flags (bits 0, 2, 4, 6, 7, and 11) of the FLAGS register indicate the results of arithmetic instructions, such as the ADD, SUB, MUL, and DIV instructions. The functions of the status flags are as follows: 
• CF (bit 0) Carry flag. Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise.This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic.
• PF (bit 2) Parity flag. Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. 
• AF (bit 4) Adjust flag. Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic.
• ZF (bit 6) Zero flag. Set if the result is zero; cleared otherwise.
• SF (bit 7) Sign flag. Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.)
• OF (bit 11) Overflow flag. Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic.

Of these status flags, only the CF flag can be modified directly, using the STC, CLC, and CMC instructions. Also the bit instructions (BT, BTS, BTR, and BTC) copy a specified bit into the CF flag. The status flags allow a single arithmetic operation to produce results for three different data types: unsigned integers, signed integers, and BCD integers. If the result of an arithmetic operation is treated as an unsigned integer, the CF flag indicates an out-of-range condition (carry or a borrow); if treated as a signed integer (two’s complement number), the OF flag indicates a carry or borrow; and if treated as a BCD digit, the AF flag indicates a carry or borrow. The SF flag indicates the sign of a signed integer. The ZF flag indicates either a signed- or an unsigned integer zero.

When performing multiple-precision arithmetic on integers, the CF flag is used in conjunction with the add with carry (ADC) and subtract with borrow (SBB) instructions to propagate a carry or borrow from one computation to the next. The condition instructions Jcc (jump on condition code cc), SETcc (byte set on condition code cc), LOOPcc, and CMOVcc (conditional move) use one or more of the status flags as condition codes and test them for branch, set-byte, or end-loop conditions.

• DF FLAG The direction flag (DF, located in bit 10 of the FLAGS register) controls the string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (that is, to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). The STD and CLD instructions set and clear the DF flag, respectively.
• System Flags  The system flags register control operating-system or executive operations. They should not be modified by application programs. The functions of the system flags are as follows:
• IF (bit 9) Interrupt enable flag. Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts.
• TF (bit 8) Trap flag. Set to enable single-step mode for debugging; clear to disable single-step mode.
• IOPL (bits 12, 13) I/O privilege level field. Indicates the I/O privilege level of the currently running program or task. The current privilege level (CPL) of the currently running program or task must be less than or equal to the I/O privilege level to access the I/O address space. This field can only be modified by the POPF and IRET instructions when operating at a CPL of 0.
• NT (bit 14) Nested task flag. Controls the chaining of interrupted and called tasks. Set when the current task is linked to the previously executed task; cleared when the current task is not linked to another task.